FPGA Verification Engineer - Avionics

Key Responsibilities:

Develop UVM-based verification environments including agents, scoreboards, and bit-accurate reference models.

Create and maintain a reusable, extendable UVM framework supporting multiple FPGA targets and device configurations.

Write verification plans derived from requirements specifications and architectural documents.

Develop functional coverage models and drive coverage closure for all FPGA designs.

Perform RTL simulation using industry-standard tools.

Implement clock-domain crossing verification and timing/stability analysis.

Apply lint and static-analysis tools to identify design issues early in the development cycle.

Support hardware bring-up by creating tests that model and recreate hardware interactions in simulation.

Document verification results, coverage metrics, and test plans with clear technical writing.

Collaborate with FPGA designers and system engineers to refine requirements and close verification gaps.

Required Qualifications:

Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.

4+ years of experience in FPGA or ASIC verification.

Strong expertise in SystemVerilog and UVM-based verification methodology.

Experience building UVM agents, environments, and generating constrained-random stimulus.

Proficiency with at least one industry-standard RTL simulator.

Understanding of functional coverage techniques and coverage-driven verification.

Ability to read and understand PCB schematics and hardware interfaces for test development.

Preferred Qualifications:

Experience verifying designs for space, aerospace, or high-reliability applications.

Familiarity with formal verification tools.

Background in embedded software interaction with FPGA firmware.

Experience with continuous integration workflows for verification regressions.

Proficiency in Python, TCL, or shell scripting for test automation and infrastructure.

Exposure to DFMEA and high-reliability digital design review processes.

Tools & Technologies:

Industry-standard RTL simulators (e.g., VCS, QuestaSim, or equivalent)

UVM verification methodology

Lint and CDC analysis tools

Python/TCL scripting for automation