Digital Design Engineer

Key Responsibilities:

Own schematic design and component selection for digital avionics boards, from concept through flight qualification.

Design high-speed SERDES interfaces (PCIe, JESD, gigabit links) and DDR4/DDR5 memory interfaces with proper timing closure.

Develop clocking architectures including PLL configuration, jitter management, and clock distribution networks.

Perform power budgeting and system-level power allocation across board subsystems.

Apply radiation-tolerant design techniques including SEU/SEE mitigation, TID considerations, and appropriate component derating.

Collaborate with FPGA engineers on support circuitry design, pinout planning, and power/layout requirements.

Drive board bring-up activities including configuration, interface verification, and structured debugging.

Participate in design reviews and cross-functional integration with RF, power, thermal, and mechanical teams.

Required Qualifications:

Own schematic design and component selection for digital avionics boards, from concept through flight qualification.

Design high-speed SERDES interfaces (PCIe, JESD, gigabit links) and DDR4/DDR5 memory interfaces with proper timing closure.

Develop clocking architectures including PLL configuration, jitter management, and clock distribution networks.

Perform power budgeting and system-level power allocation across board subsystems.

Apply radiation-tolerant design techniques including SEU/SEE mitigation, TID considerations, and appropriate component derating.

Collaborate with FPGA engineers on support circuitry design, pinout planning, and power/layout requirements.

Drive board bring-up activities including configuration, interface verification, and structured debugging.

Participate in design reviews and cross-functional integration with RF, power, thermal, and mechanical teams.

Preferred Qualifications:

Experience with satellite or spacecraft avionics design and qualification (EM/QM/FM build cycles).

Background in non-volatile memory technologies (Flash, MRAM, FRAM) and in-system programmability.

Exposure to power supply design and power integrity analysis for digital boards.

Experience with design for radiation reliability and single-event effects mitigation at the board level.

Familiarity with signal integrity simulation tools (HyperLynx SI/PI, Ansys, ADS).

Tools & Technologies:

Altium Designer (schematic capture and layout review)

HyperLynx SI, SI/PI, and Full-Wave (signal and power integrity)

SPICE-based circuit simulation

FPGA vendor toolchains (for interface bring-up and debug)